MINIMIZATION OF PROPAGATION DELAY OF CMOS INVERTER DRIVING AN RC LOAD

Authors

  • Ratan Kumar Debnath Electronics and Communication Engineering Discipline, Khulna University, Khulna-9208, Bangladesh
  • Mohammad Ismat Kadir Electronics and Communication Engineering Discipline, Khulna University, Khulna-9208, Bangladesh
  • Jharna Mandal Electronics and Communication Engineering Discipline, Khulna University, Khulna-9208, Bangladesh

DOI:

https://doi.org/10.53808/KUS.1999.1.2.127-131-se

Keywords:

Repeater; Propagation delay; Saturation conductance; Transistor model

Abstract

The propagation delay of a signal through resistive network in large chips can limit the circuit performance. In order to develop a repeater design methodology, a complementary metal-oxide-semiconductor (CMOS) inverter driving an RC load is presented. By using Sakurai’s short channel a-power law model of transistor operation, the inverter model is applied to the problems of repeater in order to determine the reduced delay inserted along a RC line. For a typical RC load (R =1K, C =1pF), this repeater model exhibits less error as compared to a dynamic circuit simulator (SPICE).

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References

Adler, V. and Friedman, E. G., 1998. Repeater design to reduce Delay and Power in Resistive Interconnect. IEEE Transactions on Circuits and Systems, 45(5): 607-616.

Debnath, R.K., Dubey, S.K. and Kumar, S., 1999. Design Considerations of CMOS Basic Building Blocks. B. E. Thesis, University of Roorkee, Roorkee, India.

Douglas, P.A., 1985. CMOS Analog Circuit Design. Holt, Rinehart & Winston Inc., New York.

Rashid, M.H., 1996. SPICE for Circuits and Electronics Using PSPICE. Prentice-Hall of India Private Limited, New Delhi.

Sakurai, T. and Newton, A.R., 1990. Alpha-power law model and its application to CMOS inverter delays and other formulas. IEEE Journal of Solid-State Circuits, 25: 584-594.

Wu, C.Y. and Chuen, M., 1990. Delay Models and Speed Improvement Techniques for RC Tree Interconnections Among Small-Geometry CMOS inverters. IEEE Journal of Solid-State Circuits, 25: 1247-1256.

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Published

26-11-1999

How to Cite

[1]
R. K. . Debnath, M. I. . Kadir, and J. . Mandal, “MINIMIZATION OF PROPAGATION DELAY OF CMOS INVERTER DRIVING AN RC LOAD”, Khulna Univ. Stud., pp. 127–131, Nov. 1999.

Issue

Section

Science and Engineering

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